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Research Strategy and Organization:
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Environmental factors are often not included in the design and development
of new tools and processes in the semiconductor industry. Integrating Design
For the Environment into new processes and tools for the
industry is the technical driver and the common theme of the Centers
research. The Centers interdisciplinary research efforts involve
eight
universities and eleven different academic disciplines. |
The semiconductor industry is a very fast-moving industry, one which creates many
opportunities for innovation and implementation of changes. The fast pace also presents a
major challenge in planning and conducting long-term research. One challenge is to strike
the right balance between long-term development, short-term relevance, and application to
the present problems. The Centers research strategy is to maintain this balance
and promote a mix of projects and activities ranging from high-risk, high-payoff research
to smaller projects with more immediate applications.
Originally organized in Thrusts built around
semiconductor manufacturing processes: Thrust A (Back-End Processes), Thrust
B (Front-End), Thrust C (Factory Integration), and Thrust D
(Patterning), the Center's current SRC/SEMATECH research projects are listed
below.
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425.012 |
CMOS Biochip for Rapid Assessment of New
Chemicals |
| 425.013 |
Non-PFOS / Non-PFAS Photoacid Generators:
Environmentally Friendly Candidates for Next Generation Lithography |
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425.014 |
Environmentally Benign
Electrochemically-Assisted Chemical Mechanical Planarization (E-CMP) |
| 425.015 |
Reductive Dehalogenation of Perfluoroalkyl
Surfactants in Semiconductor Effluents |
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425.016 |
EHS Impact of Electrochemical Planarization
Technologies |
| 425.017 |
Environmentally Benign Vapor Phase and
Supercritical CO2 Processes for Patterned Low k Dielectrics |
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425.018 |
Destruction of Perfluoroalkyl Surfactants in
Semiconductor Process Waters Using Boron Doped Diamond Film Electrodes |
| 425.019 |
Low Environmental Impact Processing of Sub-50 nm
Interconnect Structures |
|
425.020 |
An Integrated, Multi-Scale Framework for
Designing Environmentally Benign Copper, Tantalum and Ruthenium
Planarization Processes |
| 425.021 |
Low-Water and Low-Energy Rinsing and Drying of
Patterned Wafers, Nano-Structures, and New Materials Surfaces |
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425.022 |
Environmentally Friendly Cleaning of New
Materials and Structures for Future Micro- and Nan-Electronics Manufacturing |
Additional Ongoing Research Projects:
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PFOS
Removal from Wastewater
CMP Delamination Reduction
Post-CMP
Cleaning Optimization
Supercritical CO2 Fundamentals
CMP
Waste Treatment Survey
Non-Damaging Plasma Etch
Cleaning, Rinsing, and Drying
Processes for 45 nm Node
Pore Scaling and Repair of Low-k Films |
______________
Updates in progress
Thrust A
Back-End Processes
Thrust B
Front-End Processes
Thrust C
Factory Integration
Thrust D
Patterning
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