SRC/SEMATECH Engineering Research Center for Environmentally Benign Semiconductor Manufacturing


THRUST D
Patterning

The focus of Thrust D is on revolutionary processes for patterning integrated circuits that result in reduced solvent utilization while also enhancing performance for defining smaller integrated circuit features.  One goal is to demonstrate a solventless lithography process that is compatible with advanced exposure tools.  A second goal is to combine the functionality of photosensitive resists and low dielectric constant interconnect materials.  Finally, integration of these new processes and materials into a manufacturable scheme is the ultimate motive. 

ERC researchers at MIT, Cornell University, the University of Arizona, and Stanford University are currently focusing on the following research areas:

[UPDATE IN PROGRESS]